1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof. More particularly, the present invention relates to a package substrate structure and a chip package structure, and a manufacturing process thereof.
2. Description of Related Art
In the semiconductor industry, the fabrication of integrated circuits (IC) can be divided into three phases: wafer fabrication, IC fabrication process and IC packaging, etc. Each chip is fabricated through wafer fabrication, circuit design, photolithography and etching processes, and wafer dicing, etc. After each chip formed based on the wafer dicing is electrically connected to external signals through a bonding pad on the chip, the chip can be encapsulated by a sealant material. The packaging process protects the chip from heat, humidity, and noises and provides an electrical connection medium between the chip and external circuits. By such means, packaging of the IC is completed.
Generally, a chip package structure includes a chip, a substrate, a plurality of bonding wires and a molding compound, wherein the chip has an active surface and a back surface opposite to the active surface. Moreover, the substrate is connected to the back surface of the chip to carry the chip, and the bonding wires are electrically connected between the chip and the substrate. The molding compound is disposed on the substrate for wrapping the bonding wires and the chip.
During a manufacturing process of the chip package, due to an uneven structure of a contact area between the substrate and a package mold, a gap can be generated at the contact area. In detail, reasons that causes the uneven structure of the contact area between the substrate and the package mold include: warpage of the substrate, uneven thickness of the substrate, substrate deformation due to excessive force exerted to the substrate by the package mold, un-tight lamination between the substrate and the package mold due to inadequate force exerted to the substrate by the package mold, and uneven surface of the package mold due to residual glue thereon. Influenced by one of the above reasons, when the semi-melting state sealant material is injected to the package mold, it can be infiltrated into the gap, and such phenomenon is referred to as excessive glue. The sealant material infiltrated in the gap can be attached to a conductive part of the chip package structure to insulate the conductive part, so that a following manufacturing process can be influenced.